PA - Multichannel analog lock-in amplifier for EIT

Mehrkanaliger analoger Lock-in-Verstärker für EIT

 

Multichannel analog lock-in amplifier for EIT

 

Objective

The goal of this work is to design, implement, and evaluate a multichannel analog lock-in amplifier system for Electrical Impedance Tomography (EIT) and to evaluate the feasibility of using such a design in a high channel count EIT system. The lock-in amplifier system should process multiple input signals in parallel (minimum of 4, better 16), covering a voltage range of +-5 V and operating at frequencies from 1 kHz to 100 kHz. The signal amplitudes of the inputs will be in a range of 1mV to 100mV and have a SNR of around 20dB. The system's accuracy must achieve an amplitude error of less than 1% and a phase error of less than 5° for all channels over the complete specified range of operation.

Tasks

Literature Review and Theoretical Background

  • Research the principles of lock-in amplifiers, focusing on their application in EIT.

  • Study the challenges of multichannel signal processing and the design considerations for analog circuits.

  • Identify the performance in terms of measurement error of existing analog lock-in amplifiers.

System Design

  • Develop a circuit design for multiple lock-in amplifiers capable of processing signals in the specified range.

  • Select appropriate components (e.g., operational amplifiers, filters, mixers, etc.) to meet the accuracy and frequency requirements.

  • Simulate and evaluate the system design via simulations tools (e.g. LTSpice).

PCB Design and Implementation

  • Create a schematic and PCB layout using CAD software (e.g., Altium Designer, KiCAD).

  • Fabricate the PCB and assemble the components.

Integration and Testing

  • Interface the PCB with suitable lab equipment for input signal generation and output evaluation (e.g., function generators, oscilloscopes).

  • Verify the system's performance in terms of amplitude and phase accuracy.

Calibration

  • Identify and perform the necessary measurements needed to calibrate for the measurement errors.

  • Implement a calibration algorithm.

  • Analyze the measurement error with calibration.

Evaluation and Optimization

  • Analyze the measurement results to identify sources of error.

  • Propose improvements to the design if necessary to meet the error thresholds.

  • Evaluate the feasibility of using parallel analog lock-in amplifiers for a 256 channel EIT system

Name:

 

Thesis Type MA/BA/PA:

PA

Student ID / Matrikelnummer:

 

Field of Study / Studiengang:

 

Official start-date / Offizieller Beginn:

 

Final-report-due /Abgabe:

 

Spotlight-presentations:

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Finale presentation / Abschlusspräsentation

 

Zweitprüfer / Second Examiner

 

Confidential / Vertraulich

 

Document Upload Final Thesis / Dokumentenabgabe Abschlussdokument

File of final presentation / Dokumentenabgabe Abschlusspräsentation

Link for further files / Link für weitere Dokumente

 

Institut für Mechatronik im Maschinenbau (iMEK), Eißendorfer Straße 38, 21073 Hamburg